functional block diagrams 0.1? 6.3v 0.1? 6.3v 0.1? 16v 0.1? 6.3v +5v to +10v voltage doubler +10v to ?0v voltage inverter 0.1? 16v +5v input v cc v+ v c1+ c1 c2+ c2 adm202 6 gnd 15 4 5 3 1 2 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 13 10 7 11 8 14 9 12 16 * internal 400k pull-up resistor on each ttl/cmos input **internal 5k pull-down resistor on each rs-232 input +5v input v cc v+ v c1+ c1 c2+ c2 gnd adm203 7 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 4 1 18 2 19 5 20 3 8 13 12 17 14 11 15 10 16 v c2 c2+ 9 6 gnd do not make connections to these pins internal ?0v power supply internal +10v power supply rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a high speed, +5 v, 0.1 m f cmos rs-232 driver/receivers adm202/adm203 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 general description the adm202/adm203 is a two-channel rs-232 line driver/ receiver pair designed to operate from a single +5 v power sup- ply. a highly efficient on-chip charge pump design permits rs-232 levels to be developed using charge pump capacitors as small as 0.1 m f. the capacitors are internal to the package on the adm203 so no external capacitors are required. these con- verters generate 10 v rs-232 output levels. the adm202/adm203 meets or exceeds the eia-232-e and v.28 specifications. fast driver slew rates permit operation up to 120 kb while high drive currents allows for extended cable lengths. an epitaxial bicmos construction minimizes power consump- tion to 10 mw and also guards against latch-up. overvoltage protection is provided allowing the receiver inputs to withstand continuous voltages in excess of 30 v. in addition, all pins contain esd protection to levels greater than 2 kv. the adm202 is available in 16-lead dip and both narrow and wide soic packages. the adm203 is available in a 20-pin dip package. features 120 kb transmission rate adm202: small (0.1 m f) charge pump capacitors adm203: no external capacitors required single 5 v power supply meets eia-232-e and v.28 specifications two drivers and two receivers on-board dc-dc converters 6 9 v output swing with +5 v supply low power bicmos: 2.0 ma i cc 6 30 v receiver input levels applications computers peripherals modems printers instruments
adm202/adm203Cspecifications rev. 0 C2C (v cc = +5 v 6 10%, (adm202 c1Cc4 = 0.1 m f. all specifications t min to t max , unless otherwise noted) parameter min typ max units conditions/comments output voltage swing 5 9vv cc = 5 v 5%, t1 out , t2 out loaded with 3 k w to gnd output voltage swing 5 9vv cc = 5 v 10%, t a = +25 c, t1 out , t2 out loaded with 3 k w to gnd v cc power supply current. 1.5 2 ma no load, t1 in , t2 ln = v cc 3.0 4 ma no load, t1 in , t2 in = gnd input logic threshold low, v inl 0.8 v t in input logic threshold high, v inh 2.0 v t in logic pull-up current 10 25 m at in = 0 v rs-232 input voltage range C30 +30 v rs-232 input threshold low 0.8 1.2 v rs-232 input threshold high 1.7 2.4 v rs-232 input hysteresis 0.2 0.5 1.0 v rs-232 input resistance 3 5 7 k w ttl/cmos output voltage low, v ol 0.4 v i out = 1.6 ma ttl/cmos output voltage high, v oh 3.5 v i out = C1.0 ma propagation delay 0.5 5 m s rs-232 to ttl instantaneous slew rate 1 25 30 v/ m sc l = 10 pf, r l = 3C7 k w , t a = +25 c transition region slew rate 5 v/ m sr l = 3 k w , c l = 2500 pf measured from +3 v to C3 v or C3 v to +3 v baud rate 120 kb r l = 3 k w , c l = 1 nf output resistance 300 w v cc = v+ = vC = 0 v, v out = 2 v rs-232 output short circuit current 10 60 ma note 1 sample tested to ensure compliance. specifications subject to change without notice. absolute maximum ratings* (t a = +25 c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6 v v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (vcc C 0.3 v) to +14 v vC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C14 v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 v output voltages t out . . . . . . . . . . . . . . . . . . . (v+, +0.3 v) to (vC, C 0.3 v) r out . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous power dissipation n-16 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mw r-16n soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mw r-16w soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mw n-20 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890 mw thermal impedance n-16 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 c/w r-16n soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w r-16w soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w n-20 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 c/w operating temperature range commercial (j version) . . . . . . . . . . . . . . . . . .0 c to +70 c storage temperature range . . . . . . . . . . . . . C65 c to +150 c lead temperature soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 v *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specifica- tion is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ordering guide model temperature range package option adm202jn 0 c to +70 c n-16 ADM202JRN 0 c to +70 c r-16n adm202jrw 0 c to +70 c r-16w adm203jn 0 c to +70 c n-20
adm202/adm203 rev. 0 C3C pin configurations dip/soic 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view (not to scale) adm202 t1 in r1 in t1 out r1 out v+ v cc gnd t2 in r2 in t2 out r2 out v c1+ c1 c2 c2+ dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 top view (not to scale) adm203 r1 in t2 in r2 in t1 out t2 out r1 out v+ v v cc c1+ c2 c2+ c1 gnd gnd c2+ c2 r2 out v t1 in 0.1? 6.3v 0.1? 6.3v 0.1? 16v 0.1? 6.3v +5v to +10v voltage doubler +10v to ?0v voltage inverter 0.1? 16v +5v input v cc v+ v c1+ c1 c2+ c2 adm202 6 gnd 15 4 5 3 1 2 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 13 10 7 11 8 14 9 12 16 * internal 400k pull-up resistor on each ttl/cmos input **internal 5k pull-down resistor on each rs-232 input +5v input v cc v+ v c1+ c1 c2+ c2 gnd adm203 7 t1 in rs-232 outputs ttl/cmos inputs * t1 out t2 in r1 out r2 out t2 out r1 in r2 in r1 r2 t2 t1 ttl/cmos outputs rs-232 inputs ** 4 1 18 2 19 5 20 3 8 13 12 17 14 11 15 10 16 v c2 c2+ 9 6 gnd do not make connections to these pins internal ?0v power supply internal +10v power supply figure 1. typical operating circuits pin function description mnemonic function v cc power supply input 5 v 10%. v+ internally generated positive supply (+10 v nominal). vC internally generated negative supply (C10 v nominal). gnd ground pin. must be connected to 0 v. c1+ adm202 external capacitor, (+ terminal) is connected to this pin. adm203: the capacitor is connected internally and no external capacitor is required. c1C adm202 external capacitor, (C terminal) is connected to this pin. adm203: the capacitor is connected internally and no external capacitor is required. c2+ adm202 external capacitor, (+ terminal) is connected to this pin. adm203: the capacitor is connected internally and no external capacitor is required. c2C adm202 external capacitor, (C terminal) is connected to this pin. adm203: the capacitor is connected internally and no external capacitor is required. t in transmitter (driver) inputs. these inputs accept ttl/cmos levels. an internal 400 k w pull-up resistor to v cc is connected on each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 10 v).
adm202/adm203 rev. 0 C4C r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k w pull-down resistor to gnd is connected on each of these inputs. r out receiver outputs. these are ttl/cmos levels. general information the adm202/adm203 is an rs-232 drivers/receivers designed to solve interface problems by meeting the eia-232e specifica- tions while using a single digital +5 v supply. the eia standard requires transmitters that will deliver 5 v minimum on the transmission channel and receivers that can accept signal levels down to 3 v. the parts achieve this by integrating step up voltage converters and level shifting transmitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. the adm203 uses internal capacitors and, therefore, no exter- nal capacitors are required. the adm202 contains an internal v oltage doubler and a voltage inverter which generates 10 v from the +5 v input. external 0.1 m f capacitors are required for the internal voltage converter. the adm202/adm203 is a modification, enhancement and improvement to the ad230Cad241 family and derivatives thereof. it is essentially plug-in compatible and does not have materially different applications. circuit description the internal circuitry consists of three main sections. these are (a) a charge pump voltage converter (b) rs-232 to ttl/cmos receivers (c) ttl/cmos to rs-232 transmitters charge pump dc-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages using a switched capacitor technique as illustrated below. first, the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the 10 v level is then inverted to gen- erate C10 v using c2 as the storage element. capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output imped- ance on the v+ and vC supplies. on the adm203, all capaci- tors c1 to c4 are molded into the package. the v+ and vC supplies may also be used to power external circuitry if the current requirements are small. s1 s3 v+ = 2v cc s2 s4 internal oscillator c1 c3 v cc gnd v cc figure 2. charge pump voltage doubler s1 s3 s2 s4 internal oscillator c2 c4 v? = ?(v+) gnd v+ gnd from voltage doubler figure 3. charge pump voltage inverter transmitter (driver) section the drivers convert ttl/cmos input levels into eia-232-e output levels. with v cc = +5 v and driving a typical eia-232-e load, the output voltage swing is 9 v. even under worst case conditions the drivers are guaranteed to meet the 5 v eia-232-e minimum requirement. the input threshold levels are both ttl and cmos compat- ible with the switching threshold set at v cc /4. with a nominal v cc = 5 v the switching threshold is 1.25 v typical. unused inputs may be left unconnected, as an internal 400 k w pull-up resistor pulls them high forcing the outputs into a low state. as required by the eia-232-e standard the slew rate is limited to less than 30 v/ m s without the need for an external slew limiting capacitor and the output impedance in the power-off state is greater than 300 w . receiver section the receivers are inverting level shifters that accept eia-232-e input levels ( 5 v to 15 v) and translate them into 5 v ttl/ cmos levels. the inputs have internal 5 k w pull-down resis tors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v minimum and 2.4 v maximum which are well within the 3 v eia-232 requirement. the low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level. the receivers have schmitt trigger input with a hysteresis level of 0.5 v. this ensures error free reception both for noisy inputs and for inputs with slow transition times.
typical performance characteristicsCadm202/adm203 rev. 0 C5C 10 0 40 2 0 6 4 8 30 20 10 i out ?ma v cc = 5v v+ v | v out | ? figure 4. charge pump v+, vC vs. current 30 0 3k 5 0 15 10 20 25 2.5k 2k 1.5k 1k 500 v cc = 5v r l = 3k f = 10khz capacitive load ?pf slew rate ?v/? low to high slew rate high to low slew rate w figure 5. transmitter slew rate vs. load capacitance 10 90 100 0% 5v 3.6 v a1 5v 5? figure 6. transmitter fully loaded slew rate 8 3 6 6 4 5 3 7 5 4 v cc ?v | v out | ? v out (1 o/p loaded) v out (all o/ps loaded) figure 7. transmitter output voltage vs. v cc 12 0 10 2 0 6 4 8 10 8 6 4 2 v cc = 5v i out ?ma t out ?v t out high t out low figure 8. transmitter output voltage vs. current 10 90 100 0% 5v 3.6 v a1 5v 1? figure 9. transmitter unloaded slew rate
adm202/adm203 rev. 0 C6C outline dimensions dimensions shown in inches and (mm). c1899C18C4/94 printed in u.s.a. 16-pin plastic dip (n-16) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 9 16 1 8 0.840 (21.33) 0.745 (18.93) 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 0.070 (1.77) 0.045 (1.15) 16-lead narrow soic (r-16n) 0.0500 (1.27) bsc seating plane 8 9 16 1 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.3937 (10.00) 0.3859 (9.80) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) 45 0 ?8 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 0.0196 (0.50) 0.0099 (0.25) 20-pin plastic dip (n-20) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) pin 1 0.280 (7.11) 0.240 (6.10) 20 1 11 10 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc 0.070 (1.78) 0.045 (1.15) seating plane 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) 1.060 (26.90) 0.925 (23.50) 16-lead wide soic (r-16w) pin 1 0.299 (7.60) 0.291 (7.40) 0.419 (10.65) 0.404 (10.26) 1 16 9 8 0.018 (0.46) 0.014 (0.36) 0.050 (1.27) bsc 0.107 (2.72) 0.089 (2.26) 0.413 (10.50) 0.348 (10.10) 0.010 (0.25) 0.004 (0.10) 0.015 (0.38) 0.007 (1.18) 0.045 (1.15) 0.020 (0.50) 0.364 (9.246) 0.344 (8.738)
|
